» Lower cost, higher design flexibility, more capabilities in smaller packages and lower-cost, smarter tools. The tool part makes us think that vendors of such products are listening to you, Engineers.
(1) ORANGE TREE TECHNOLOGIES C/C++ to VHDL for $995 eeProductCenter's Jon Gabay says: "The package consists of the SystemCrafter SC compiler, for the synthesis of SystemC to VHDL, and the ZestSC1 FPGA development board. The list price for the compiler is only $995, and the package of compiler and board is only $1490. This is a breakthrough in price for SystemC synthesis technology.
" Readers say: » "If it works as claimed, it has the potential to be disruptive in the market."
» "Price/performance is significantly improved. Larger companies' products are very expensive. Standard work environments and tools."
» "With this tool, programming VHDL is no longer somebody's special trick."
» "Very important tool for those who have just a rudimentary knowledge of VHDL, at a very low price point."
» "Great price for a cool idea..."
USABILITY RANK: 1
(2) LATTICE SEMICONDUCTOR RTL synthesis support is downloadable eeProductCenter's Jon Gabay says: "Full support for all Lattice digital programmable logic devices, including the new LatticeECP-DSP and LatticeEC FPGA families, is included in this product release. Lattice also continues to offer a wide range of leading synthesis and simulation tools with ispLEVER, including Mentor Graphics LeonardoSpectrum synthesis and the ModelSim simulator.
" Readers say: » "I used this tool at a Workshop in Ottawa. I found the HDL Designer Series and Precision synthesis tool very well integrated. Besides, switching between source code and graphic schematic was fast and accurate. Virtex 4 should be added. Synthesized signal names easily traced back to the source code. In total my first impression was good."
» "A good solid product for DSP and RFID development."
» "Good to see tool support for the Lattice PLDs from Mentor."
» "Cool."
» "Sounds great. Being more "ASIC-like" in design methodologies and synthesis and timing analysis and DFT and signal integrity should be the ultimate goal."
» "Already use it, so glad to see support for more vendor products"
USABILITY RANK: 3
(3) ALTERA FPGA front end streamlines transition to ASIC eeProductCenter's Jon Gabay says: "HardCopy II devices are the industry's most compelling structured ASICs, featuring a unique FPGA front-end design methodology and costs as low as $15 for 1 million ASIC gates. Built on a new fine-grained architecture designed for low cost, HardCopy II structured ASICs deliver a level of gate densities, performance, and low power consumption that make them the best solution for a broad range of ASIC and ASSP implementations.
" Readers say:
» "Definitely sound thinking here re: value of ASIC v. FPGA."
» "I've been watching advances in ASIC technology from the sidelines for several years, but the numbers never added up for our business. The NRE and price point makes the product worth a detailed look."
» "Appears to be a good step in the right direction for enabling cost-effective entry into 90nm for a wider base of applications."
» "Quite impressive. Kind of sounds too good to be true. It will be interesting to see just how many designs can actually use this to migrate to high-volume ASIC technology."
» "Unless the $15 unit cost is a "killer", the development time, cost, and risk associated with conventional ASIC design position the Altera HardCopy offering as a viable -- even preferable -- alternative in the vast majority of applications..."
» "Hardcopy II seems like the best of both worlds for a design methodology that calls for an FPGA prototype that will become an ASIC. It appears Altera has solved most of the problems typically inherent in these types of migrations, including timing closure (specifically for hold times) and use of IP specifically targeted at and optimized for the FPGA features."
USABILITY RANK: 6
(4) CYPRESS MICROSYSTEMS Mixed signal for under a buck eeProductCenter's Jon Gabay says: "I'm impressed by the CY82C21x34. Check out all that's packed inside this part. In addition to the four configurable analog blocks and four configurable digital blocks, the new devices provide eight Kbytes of flash memory for program storage and 512 bytes of SRAM. There is also a built-in low-Ron 28:1 analog input multiplexor. " Readers say: » "A lot of sweat goes into developing an SoC for analog...it's a different ballgame than creating SoC's for DSP or FPGA. Very good product."
» "An interesting niche product."
» "This part is an answer to my dreams - I've already started the evaluation process to use it in my very next design."
» "An amazingly low price point for such a device. Makes one reconsider micro-controller based designs."
» "Impressive!!"
» "Price and real-time, in-circuit reconfigurability position this device family in a class by itself. If a clever designer can use TIME as an ally...this device could replace not one by SEVERAL mixed-signal devices in many applications. Time-to-market and in-field upgradability are additional benefits..."
USABILITY RANK: 4
(5) ALTERA Industry's 'lowest cost' CPLD available now eeProductCenter's Jon Gabay says: "As the lowest cost member of the MAX II family, the EPM240 has 240 logic elements (LEs) and is ideal for volume-driven, price-sensitive applications. Also shipping as a production-qualified device is the 1.8-V EPM240G version of MAX II, which offers the industry's lowest dynamic-power consumption of any equivalent CPLD device.
" Readers say: » "Altera's low-cost focus pays off."
» "Great price point for a 240 LE CPLD."
» "Great price point for that missing link between the ASIC design plan and reality."
» "Cost point is attactive."
» "The simple, predictable timing model, inherent performance, and non-volatile nature of sum-of-products based CPLDs allows such devices to continue to find homes in new designs despite the ever-increasing density and performance of competing FPGA and ASIC offerings. The significance of the Altera CPLD lies in the low price-per-macrocell (or "Logic Element" in Altera vernacular). For a guy like me who's (in the past!) designed thousands of 22V10s into systems, this device family is VERY sexy!"
» "CPLD designers are also (typically) more tool-cost conscience than ASIC or even FPGA designers. Ergo, Altera's no-cost Quartus II Web Edition is a major plus, and will help interested parties get a feel for the features and capabilities of the products without a major investment in tools."
USABILITY RANK: 2
(6) ACTEL Lowest cost FPGA gets complete hardware support eeProductCenter's Jon Gabay says: "The new ProASIC3 Starter Kit allows designers to examine, design and program the nonvolatile ProASIC3/E devices, the industry's lowest-cost FPGA solutions. Using these new tools, engineers can examine secure in-system programmability (ISP) using AES encryption.
" Readers say: » "Solid hardware support for one of the cheapest FPGA solutions on the market."
» "Looks like a nice product."
» "Useful."
USABILITY RANK: 5
(7) FAIRCHILD SEMICONDUCTOR Two-bit logic translator increases design flexibility eeProductCenter's BettyAnn Liotta says: "The device's 1.1 V to 3.6 V range provides a lower voltage threshold than most alternatives, allowing the FXL2T245L10X to better accommodate the low voltage needs of ultra-portable applications, including cell phones, digital cameras and notebooks.
" Readers say: » "A handy little device for doing voltage translation."
» "Hoping for more family members."
» "I really like that the output enable allows reverse data flow."
» "Voltage translation chips are becoming more and more important as supply and I/O voltages shrink and the requirement to interface with existing chips that have a different I/O voltage is more critical. The selectable 3-state function is also a nice feature..."
USABILITY RANK: 7
(8) CELOXICA Block-based design entry tool for imaging and video applications eeProductCenter's Jon Gabay says: "PixelStreams provides a broad range of macro calls that allow the user to gather, manipulate and output streams of video pixel data. In addition, PixelStreams includes an IP reuse graphical editor as an entry tool for imaging algorithms to provide ease-of-use and design productivity in a familiar block-based methodology. " Readers say: » "You can't have too many video/imaging algorithms."
» "This is a good approach to the standardized but custom IP marketplace"
» "Nice product."
USABILITY RANK: 9
(9) EXAR Exar claims industry's first multi-channel 66MHz PCI 3.0 compliant UART eeProductCenter's Stephan Ohr says: "The XR17V25x family of UARTs form the heart of many popular data communications interfaces (like RS232, RS422 and RS485), telecommunications modems and a wide variety CPU peripherals.
" Readers say: » "Tracks nicely along the lower power/higher performance trend line."
» "Send samples of new product with data sheets."
» "For specific applications where MULIPLE UARTs are required, the features and capabilities of this Exar offering should be appealing..."
USABILITY RANK: 8
(10) PHILIPS SEMICONDUCTORS BiCMOS Logic Device comes in tiny lead-free package eeProductCenter's Jon Gabay says: "Ideal for space-constrained, performance-hungry applications such as networking and telecommunications equipment, set-top box solutions and many other computing appliances, the 74LVT125BQ and 74LVT126BQ BiCMOS logic devices in DQFN packaging will enable designers to further shrink circuit boards or free board space for additional components and functionality.
" Readers say: » "Should be helpful in reducing the form factor for boards."
USABILITY RANK: 10
