| ||||||||||||||||||||
|
|
|
|
||||||||||||||||||
|
|
|
|
||||||||||||||||||
|
|
||||||||||||||||||||
|
|
||||||||||||||||||||
![]()
Test / Measurement
![]() Audio Designline Automotive Designline CommsDesign Digital Home Designline DSP Designline EDA Designline EEDesign EETimes Embedded Green Supply Line EET Supply Network Industrial Control Designline Mobile Handset Designline Teardown.com TechOnline PL Designline Planet Analog Power Managment DL RF Designline Semiconductor Insights Silicon Strategies VI Designline Webinar Wireless Designline Analog Europe Automotive Europe Power Management Europe Automotive Europe
|
|
Beaverton, Ore. Tektronix, Inc. has introduced the TLA7S16 and TLA7S08 serial analyzers for test and validation of PCI Express (PCIe) 1.0 and 2.0 designs. Unlike competing protocol analyzers, these products uniquely provide detailed PCIe 2.0 protocol information along with cross-bus analysis, said the company.
PCI Express 2.0 introduces performance enhancements for the computer, storage, and communications industries. The primary enhancement of PCI Express 2.0 is the speed increase from 2.5 Gbits/s to 5.0 Gbits/s, which translates into validation challenges in terms of capturing the signal at twice the speed, verifying power management, and performing cross-bus analysis, said Tektronix.
PCI Express 2.0 link width and speed negotiation requires debugging the logical sub-block of the physical layer where logic analysis instruments are able to provide detailed data. The TLA7S08 and TLA7S16 serial analyzers can acquire x1, x4 links or x8 links respectively. Two TLA7S16 serial analyzers are used for bi-directional x16 links.
PCIe 2.0 links can change width (number of lanes) dynamically and the specification also allows for the link to dynamically alternate the speed between 2.5 Gbits/s to 5 Gbits/s, supporting both PCIe 1.0 and 2.0 standards. Additionally, a link can go into idle power states during the short periods of time when it is not being used. The serial analyzers can validate these link operations to ensure that they are performed correctly during the width and speed changes and during transitions to and from power management states, said Tektronix.
In addition to the serial analyzers, the P6716/P6708 mid-bus probes and pre-release slot interposer probes are available to test and validate all layers of the PCIe 2.0 protocol. The new analyzers plug into Tektronix TLA7000 series logic analyzers adding the ability to debug and correlate general-purpose signals and other system interconnects including memory and computer processors. The TLA7000 logic analyzer is also able to time correlate interactions between PCIe, processors, and memory using a single test platform.
Together, the TLA7000 series logic analyzer, TLA7S16 and TLA7S08 serial analyzers, P6716/P6708 mid-bus probes and the pre-release slot interposer probes are used to test and validate all layers of the PCIe protocol: physical, data link, and transaction layers.
Pricing: Starting price for the serial analyzers is $55,000 U.S. MSRP. Mid-bus probes begin at $16,000 U.S. MSRP.
Tektronix, www.tektronix.com
| ||||||||||||||||||
|
||||||||||||||||||||
|
|
||||||||||||||||||||
|
All materials on this site Copyright © 2010 TechInsights, a Division of United Business Media LLC. All rights reserved. Privacy Statement | Terms of Service. |
||||||||||||||||||||