10GBASE-T: 10G Ethernet on copper cabling Part I: a comprehensive look at 10GBASE-T, what it is, how it compares with 1000BASE-T, and implementation challenges. Next week, Part II will help solve Echo and NEXT cancellation, gain advantage of DSP and efficient analog processing, and deal with FEXT, Alien Crosstalk and power back off.

George Zimmerman and Bruce Tolley, Solarflare Communications

Network Systems Designline (03/22/2006 9:54 AM ET)

The IEEE 802.3an 10GBASE-T committee is currently finishing the specification for 10G Ethernet on twisted pair copper cabling. The specification will be ratified as an Ethernet 802.3 standard by June 2006. Because Solarflare and other companies have been supporting, contributing to and tracking the standard, PHY layer chipsets will be available soon, which will enable systems companies to build Ethernet switches and NICs with 10GBASE-T interfaces, delivering products to end user companies starting in late 2007 and into 2008.

10GBASE-T offers two important attributes to network managers and IT professionals planning data centers and enterprise networks. First, it supports legacy copper UTP cabling and for new installations of copper cabling, it maintains the structured cabling paradigm and support for RJ-45 connections and patch panels. Second, 10GBASE-T will enable over time lower cost 10G interconnects by enabling high-density 10G switches.

Eighty percent of cabling inside buildings today is Category 5e or better. Based on its lower cost and plug-and-play simplicity, twisted pair copper cabling remains the media of choice for in–building horizontal runs and data center cabling. 10GBASE-T will support Category 6 links at distances from 55 to 100 meters. Although not specifically referenced in the standard, Category 5E channels can also be qualified to support 10GBASE-T operation.

The cabling industry has also defined a new media, augmented Category 6 or Category 6a on which 10GBASE-T supports links up to 100 meters. Because 10GBASE-T supports installed and legacy, as well as new UTP copper cabling, it maintains the plug-and-play simplicity and low operational cost of UTP cabling plant. 10GBASE-T enables network managers to scale their networks to 10 Gigabit speeds while leveraging their investment in installed copper cabling infrastructure, and for new installations, to leverage the cost-effectiveness of copper structured cabling.

To expand on the second point, similar to 1000BASE-T, as the 10GBASE-T PHY industry improves silicon manufacturing processes and moves to the next technology node, product instantiations will offer OEM customers smaller form factors and reduced power dissipation. Both of these trends will enable Ethernet switch manufacturers to increase port density, thereby lowering the cost of 10G Ethernet. Furthermore, as the 10GBASE-T market grows in volume 10GBASE-T PHYs will follow a Moore's Law curve. Therefore because of greater density, and relatively low component cost, 10GBASE-T will enable network equipment manufacturers to lower dramatically the cost of 10 Gigabit Ethernet interconnect.

From 1-Gbps to 10-Gbps
In order to explain, what 10GBASE-T is and how it works, this tutorial will now review briefly 1000BASE-T and compare it with 10GBASE-T (See Table 1). To increase Ethernet data rates to one Gbps, 1000BASE-T Ethernet uses 4-pairs in a Category 5e cable, with bi-directional signaling of multi-bit per baud trellis-coded modulation. Transceivers were required to cancel both echo and Near-end crosstalk (NEXT) on each pair of wires, and cancellation of far-end crosstalk, while recommended, was not required. In order to achieve another order of magnitude in the bit rate, 10GBASE-T takes this several steps further, both expanding the signaling rate (from 125Mbaud to 800 Mbaud) and increasing the number of levels in the transmitted signal (from 5 to 16 levels).

To attain this expansion, state-of-the-art low parity density check (LDPC) coding is employed, as well as substantial improvements to receiver sensitivity, echo and crosstalk cancellations. While these improvements in signaling, receiver sensitivity and interference cancellation make 10GBASE-T possible; to operate efficiently at higher speed, advances in algorithms and circuits and have also been taken advantage of in 10GBASE-T.

Issues for the board designer
Fortunately, much of this complexity is hidden from the board designer, and buried within the silicon. As with 1000BASE-T before, interfaces to the MAC will follow existing standard parallel interfaces. 10GBASE-T devices are expected to provide XAUI (3.125 Gbps per lane) interfaces, as did XENPAK, X2 and CX4 devices. These equalized and self-timed interfaces enable a clean board-level transition from the MAC to the PHY, which does not require close spacing of the devices.

On the line side of the device, 10GBASE-T devices will incorporate PHY vendor-specific layouts for hybrid and magnetics arrangements, similar to 1000BASE-T and previous Ethernet devices for twisted pair. By benefit of the same signaling and equalization used for transmission over the twisted-pair wire, the bandwidth required of these analog interfaces will be kept to 400 MHz. However, as in 1000BASE-T, OEMs should look to their PHY supplier for guidance on the layout between the D/A converters, the magnetics module, and the receiver front-end, to optimize the level of echo cancellation achieved.

In addition, in first-generation 10GBASE-T devices, power and cost efficiency will often drive multi-chip solutions, requiring a high-rate interface between some analog and digital devices. Typically these will use standard LVDS or similar interfaces, at rates of several hundred MHz. Such interfaces will require close proximity of the chips in a 10GBASE-T chipset, and vendors are expected to provide reference design materials.

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