NetLogic preps 100G Ethernet PHY chip Optical modules seen as gating next-gen designs

Rick Merritt

EE Times (11/10/2008 8:00 AM ET)

SAN JOSE, Calif. — NetLogic Microsystems Inc. is angling to become the first company to sample a physical layer chip for the upcoming 40/100 Gbit Ethernet standard. The company plans to see first silicon in December for an all CMOS device that consumes about 500 milliwatts per channel.

The part represents one of the first pieces of the puzzle for a market expected to come together slowly over the next few years. To date carriers including AT&T, Comcast and Verizon have conducted trials of 100 Gbit Ethernet using prototype systems from companies including HuaWei and NEC.

Some system makers hope to field commercial products before the end of 2009. But they will have to wait for a new class of so-called CFP optical modules not expected to roll out until next summer.

"It's a bit early to know how [100G Ethernet] will ramp, but we've been pleasantly surprised by the fact everyone is interested," said Ron Jankov, chief executive of NetLogic (Mountain View, Calif.). "It could take awhile to get into volume production due to the optics," he added.

Overall, 100G Ethernet products are expected to ramp slowly for testers and core telecom networks, given that even today's 10GE products for servers are just beginning to get traction.

"We project 10 million 10G Ethernet devices could ship in 2012," said Jag Bolaria, senior analyst with The Linley Group (Mountain View, Calif.). "Given that figure, 100G volumes will be small for a long time to come," he added.

The NetLogic PHY will fit in a 19x19mm package. It supports several configurations ranging from ten channels of 10 Gbit/s data to 25 channels of 4 Gbit/s traffic.

"Right now we have a unique situation of being the only supplier close to sampling, so we may be able to charge a premium," said Jankov. The company will not have first silicon until December, but Jankov said "I can't think of a single case where we couldn't deliver pre-production samples with first silicon."

Bolaria said he does not expect other potential competitors such as AMCC or Vitesse to roll 100G PHYs this year.

The IEEE 802.3ba standard for 40/100G Ethernet "has moved into a comment resolution phase," said Siddharth Sheth, director of PHY marketing at NetLogic. "No major changes are foreseen at this stage, so it was a good time for us to jump in" with a product, he added.

"By the end of 2009 they will probably have all the technical details sorted out and by mid-2010 have a final ballot done," he added.

Media access controllers and network processors supporting 100G Ethernet could start emerging this month, and some designs for line cards are already in the works. But optical modules will take longer.

Initially, designers may mate the NetLogic PHY to Xilinx Virtex FPGAs which have a cap ability to support a 100G MAC. "At this stage it's really a proof of concept allowing people to do field trials and chip testers, so it makes sense to implement with an FPGAs," said Bolaria.