Serialize 27 lines into a single, twisted-pair wire

Bettyann Liotta

eeProductCenter (03/24/2005 11:53 PM ET)

Sunnyvale, Calif. — The latest members of Maxim Integrated Products Inc.'s high-speed LVDS serdes family, can serialize 27 lines into a single DC-balanced twisted pair or differential line for improved EMI and low-cost routing.

DC-balancing reduces the effects of low-frequency ground fluctuations, while the serial low-voltage differential signaling (LVD)S link reduces the number of wires or traces from 28 to 2, saving cost and dramatically reducing electromagnetic interference (EMI), the company said. The LVDS inputs and outputs meet the requirements of the ANSI TIA/EIA 644 LVDS standard.

The MAX9217 (serializer) and MAX9218 (deserializer) are suited for 480 x 800 resolution LCD displays, automotive navigation and entertainment systems, digital copiers, laser printers, network switches/routers, and base stations.

The MAX9217 serializes 18 bits of LVTTL/LVCMOS RGB digital video data, 9 bits of LVTTL/LVCMOS control data, and clock into a single LVDS serial clock and data stream. The MAX9218 deserializes a single LVDS serial input into 27 single-ended LVTTL/LVCMOS outputs. Both devices feature DC-balanced outputs, which use AC coupling to allow isolation between serializer and deserializer. The DC-balanced feature reduces bit errors in the deserializer due to shift in the common mode caused by ground shift. The maximum aggregate payload data rate is 700 Mbits/s.

The serializer operates from a 3.3 V (±10 percent) core supply and features a separate input supply for interfacing to 1.8 V to 3.3 V logic levels. The deserializer features a separate output supply for interfacing to 1.8 V to 3.3 V logic-level inputs. Both devices are specified for operation from -40°C to +85°C. The LVDS inputs and outputs meet the ISO 10605 specification (±30 kV air, ±10 kV contact).

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Link Systems with a Single Twisted-Pair Wire