The LTC2208 A/D converter addresses the key requirements for maximizing performance of high sensitivity receivers and data acquisition systems. The device's exceptional spurious free dynamic range (SFDR) performance of 100 dBc, combined with 78 dB signal-to-noise ratio (SNR), enable it to resolve low level signals in the presence of large interferers and blockers, said Todd Nelson, product marketing manager of LTC's mixed-signal products.

The LTC2208 incorporates two unique features that simplify receiver design and improve system performance. The first is an internal transparent dither circuit that improves the A/D converter's SFDR response well beyond 100 dBc for low level input signals. The second feature is a digital output randomizer that dramatically reduces unwanted tones caused by digital feedback. The flexible digital outputs can be run as CMOS or low-voltage differential signaling (LVDS).

The LT2208 also features a programmable gain amplifier (PGA) front end that eases the A/D converter driver output power requirements when driving the lower input range of 1.5-V peak to peak. This improves the distortion performance and power consumption of the driver with minimal impact on A/D converter noise performance, Nelson said.

The LTC2208 packages an extensive feature set in a 9mm x 9mm QFN package delivering low power consumption at 1250 mW without the need for heat sinking. Most importantly, both the power consumption and total solution size with integrated bypass capacitance are less than half that of the nearest competitor, according to Nelson.

Designed for ease of use, it requires only a single 3.3-V supply for operation and comes with a clock duty cycle stabilizer for maintaining the A/D converter performance over varying duty cycles. The LTC2208 can accept high frequency, wide dynamic range signals, offering a wide analog input bandwidth of 700 MHz.

The LTC2208 family includes speed grades of 130-, 105-, 80-, 65-, 40-, 25- and 10- Msamples/s. In addition to the 16-bit parts, 14-bit versions will also be available before the end of the year. All devices are supported with demo boards.

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To date, the new pin-compatible family consists of 11 devices with different speed grade options. The LTC2208 has both LVDS and CMOS outputs. The others have CMOS outputs.

The LTC2255 family currently tops out at 130 Msamples/s (LTC2208), and goes all the way down to 10 Msamples/s. Naturally, lower speeds tout reduced power consumption. Power consumption on the LTC2208 is 1.25 W, compared to 150 mW for the slowest 10 Msamples/s device.

However, there are similar competing devices, with the same sampling rate, with significantly higher power consumption, Nelson said. "Another competing 16-bit A/D converter, for instance, operates at 80 Msamples/s with 2.5-W power consumption, compared to our 80 Msamples/s part, with 650 mW power consumption."

Nelson attributes some of the low power to the CMOS process — but most of it is due to the device's design, he said.

LTC has included special features in the family that can either reduce or eliminate noise and distortion, which is especially crucial at the 16-bit level. "We believe adding dither and output randomizer functions to a monolithic A/D converter has never been done before. While these features aren't new, they have been implemented by our customers previously — external to the AD converter," Nelson said.

Dither introduces pseudo random noise into the conversion process and spreads the point where it's converted to different locations around the transfer function. "Therefore you spend less time where the non-linearity occurs. This has been a real challenge for our customers to do themselves in the past," Nelson said.

No one else provides output randomizing, according to Nelson. "The randomizer takes the least significant bit (LSB) and encodes it with other outputs so there is less opportunity for all the bits to switch at once, thereby generating less noise," he said.

LTC has also seen its customers focus on noise due to digital outputs. When you are clocking output at 130 MHz, there are several techniques that can be used to minimize feedback of the digital switching noise back to the converter, Nelson said. "We already have a very low digital output swing — down to as low as half a volt and we offer LVDS outputs, because this is a parallel output bus, not a single, serial port," he said.

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